66 Commits
Author SHA1 Message Date
Martin Kroeker e24e0da779 Add sme-f64f64 to ARMV9SME archflags too 2026-08-11 17:58:17 +02:00
Martin Kroeker 2f915c5e23 Add f64f64 extension to VortexM4 options 2026-08-11 12:10:03 +02:00
Martin Kroeker 544afb15d6 stack-hazard-size is a llvm backend option 2026-07-20 00:06:48 +02:00
Martin Kroeker aedbcbc5a5 Fix conditional 2026-07-03 12:43:42 +02:00
Martin Kroeker 8a767975b0 Comment out the libclang_rt kludge, for future removal 2026-06-05 20:37:28 +02:00
Martin Kroeker faa18750d6 typo fix 2026-01-15 00:04:29 +01:00
Martin Kroeker 93cd7b9238 Force linking to clang_rt_builtins when using LLVM for AppleM4 2026-01-14 23:11:13 +01:00
Martin Kroeker 6735872092 drop the cpu=apple-m4 part as nonessential 2026-01-14 11:28:19 +01:00
Martin Kroeker 5e5f9a39ad Apple Clang absolutely needs the +sme in the arch string 2026-01-13 21:05:11 +01:00
Martin Kroeker 618bcbd7c0 adjust M4 options to avoid undefined references with non-Apple LLVM 2026-01-05 19:09:09 +01:00
Martin Kroeker f4383d0235 syntax fix 2025-12-31 19:41:46 +01:00
Martin Kroeker 275eb6f7f3 Add workaround for current LLVM SME bug on Windows 2025-12-31 15:29:27 +01:00
Martin Kroeker 8211db6203 Don't enable SME for VortexM4 when the compiler is gcc (which does not support it w/out SVE) 2025-10-19 13:31:30 -07:00
Martin Kroeker ba9d2d29f3 remove sme from M4 Fortran flags as gfortran couples it with sve 2025-10-02 05:11:34 -07:00
Martin Kroeker b0a00fbd62 Add minimal compiler flags for VORTEXM4 2025-08-18 01:51:10 -07:00
Chris Sidebottom 87247daadc Add NEOVERSEV2 target support
Did a quick run around to make `TARGET=NEVOERSEV2` build successfully.

Fixes #5385
2025-07-24 12:40:31 +01:00
davidz-ampere aa90ab4142 Add support for Ampere AmpereOne processors 2025-06-24 00:12:34 -04:00
davidz-ampere be68ef03b4 Add support for Ampere processors 2025-06-15 22:00:40 -04:00
Vaisakh K V f66ca05b31 Merge branch 'develop' into topic/sgemm_direct_sme1 2025-02-13 14:54:37 +05:30
Vaisakh K V d23eb3b93e Support for SME1 based sgemm_direct kernel for cblas_sgemm level 3 API
* Added ARMV9SME target
* Added SGEMM_DIRECT kernel based on SME1
2025-02-13 14:51:21 +05:30
Ye Tao c748e6a338 optimized sbgemm kernel for neoverse-v1 (sve-256)
Signed-off-by: Ye Tao <ye.tao@arm.com>
2025-02-05 10:06:37 +00:00
Martin Kroeker 1c4401ebf1 Add target-specific options to enable SVE with the NVIDIA compiler 2024-12-19 14:32:24 -08:00
Chris Sidebottom 54ce33e851 Fix GCC11 check for A64FX target 2024-07-29 15:28:59 +01:00
Chris Sidebottom 3ed226d3f8 Re-add ISCLANG filter 2024-07-29 11:32:59 +01:00
Chris Sidebottom 85ca003ae7 Add fallback compile options for A64FX target 2024-07-29 11:25:03 +01:00
Matthias Langer 0050a9660b Correctly detect ARM Neoverse V2 CPUs. 2024-05-16 09:59:52 +00:00
Martin Kroeker 14e71c249d retain the bf16 capability in fallback versions of the -march option for NeoverseN2 2024-04-05 23:01:34 +02:00
Martin Kroeker b925f61fb0 Add support for Cortex-A76 2024-04-02 19:44:17 +02:00
Martin Kroeker c1f7a81663 fix mtune for CortexX1, add mtune for X2 and A710 2024-03-10 23:19:56 +01:00
Martin Kroeker 48a4c4d454 Use +sve in arch declarations of the fallback paths for SVE targets 2024-01-26 16:30:52 +01:00
Martin Kroeker 025a1b2c7b Only use mtune=native when not cross-compiling 2024-01-15 22:40:21 +01:00
Martin Kroeker affeef0b9c Fix gmake build not always picking the right ARM64 arch options for clang (#4136)
* Fix gcc version checks erroneously excluding clang

* Avoid some mtune names not supported by (Apple)Clang
2023-07-13 08:38:03 +02:00
Chris Sidebottom f76e3de3a5 Remove SVE from Arm(R) Neoverse(TM) N1 CPU in Makefile
I incorrectly added `+sve` to the Neoverse(TM) N1 CPUs GCC parameters,
which doesn't support SVE - this results in failed builds when using a
compiler that doesn't support `-mtune=neoverse-n1` which appears to hide
the mistake.
2022-12-06 21:23:07 +00:00
Chris Sidebottom fd4f52c797 Add SVE implementation for sdot/ddot
This adds an SVE implementation to sdot/ddot when available, falling back to the previous Advanced SIMD kernel where there's no SVE implementation for the kernel.

All the targets were essentially treating `dot_thunderx2t99.c` as the Advanced SIMD implementation so I've renamed it to better fit with the feature detection.
2022-12-01 12:07:50 +00:00
Martin Kroeker c957ad684e Bump gcc requirement for NeoverseN2 and V1 to 10.4 2022-11-09 10:46:43 +01:00
Martin Kroeker ae3bcc8949 Drop NeoverseN2 to armv8.2-a on OSX to make it build with gcc11 too 2022-08-31 10:41:01 +02:00
Martin Kroeker 68277282df Work around XCode assembler SVE bug 2022-08-30 22:26:16 +02:00
Martin Kroeker f8c5bdfbab Treat Fujitsu fcc on Fugaku like clang 2022-07-25 19:48:59 +02:00
Honglin Zhu ec0d5c7a2a Add gfortran parameters 2022-06-29 10:17:05 +08:00
Honglin Zhu 55d686d41e neoverse n2 sbgemm:
implement ncopy tcopy kernel_8x4
2022-06-29 10:14:21 +08:00
Martin Kroeker 848722926c CortexX1 is only ARMV8 2022-03-28 17:18:56 +02:00
Martin Kroeker 09b8545fc5 Add initial support for M1 on Linux, Phytium FT2xxx series, ARM Cortex 510/710/X1/X2 2022-03-27 15:24:40 +02:00
Sunita Nadampalli 19c8f615dc OpenBLAS: aarch64: Add neoverse-v1/n2 architecture specifics 2022-01-07 00:28:17 +00:00
Bine Brank 7093372e32 add ARMV8SVE target 2021-11-01 22:53:21 +01:00
Martin Kroeker 6975cbe1f0 Enable SVE for A64FX 2021-10-19 23:23:40 +02:00
Martin Kroeker 22bf5c27ba Add basic support for the Fujitsu A64FX (#3415)
* Add initial support for Fujitsu A64FX as generic ARMV8
2021-10-18 15:00:19 +02:00
Martin Kroeker b57acdf2d3 Add march/mtune flags for clang builds on ARM64 as well (#3414)
* Add march/mtune flags for clang as well
2021-10-18 00:26:14 +02:00
Martin Kroeker efbd7c7840 GCC did not support -mtune for ARM64 before 5.1 2021-07-23 13:42:52 +02:00
User User-User b7da75e4fd WiP CORTEX A55 support 2021-06-19 21:37:51 +02:00
Noan 32264ba496 Update Makefile.arm64
Added -march and -mtune flags for EMAG processors when GCC 9 or later
2021-05-16 09:49:13 +00:00