 Zhang Xianyi
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2fb02626da
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Update organization info.
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2014-11-25 15:28:58 +08:00 |
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Timothy Gu
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6c2ead30f0
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Remove all trailing whitespace except lapack-netlib
Signed-off-by: Timothy Gu <timothygu99@gmail.com>
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2014-06-27 12:05:18 -07:00 |
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Xianyi Zhang
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77b7020d69
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changed prefetch order.
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2011-01-29 03:03:34 +08:00 |
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Xianyi Zhang
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e003b811ab
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load x & y contiguously in axpy.
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2011-01-28 11:18:50 +08:00 |
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Xianyi Zhang
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ebe2da8474
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Modified aligned size. Added additional prefetch instruction because of cache line is 32 bytes in Loongson 3A.
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2011-01-27 23:07:06 +08:00 |
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Xianyi Zhang
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c0b5992fab
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added axpy kernel with prefetch for Loongson3A. To-Do: tuning prefetch distance & instruction order.
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2011-01-26 22:34:33 +08:00 |
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