Jim Cownie
4d047e96ab
OpenMP 4.0 "target" directives. This will need more work for generality, but we want to get it out and visible to the community. git-svn-id: https://llvm.org/svn/llvm-project/openmp/trunk@205909 91177308-0d34-0410-b5e6-96231b3b80d8
91 lines
2.8 KiB
TeX
Executable File
91 lines
2.8 KiB
TeX
Executable File
% Latex header for doxygen 1.8.3.1
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\documentclass{book}
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\usepackage[a4paper,top=2.5cm,bottom=2.5cm,left=2.5cm,right=2.5cm]{geometry}
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\usepackage{makeidx}
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\usepackage{natbib}
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\usepackage{graphicx}
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\usepackage{multicol}
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\usepackage{float}
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\usepackage{listings}
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\usepackage{color}
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\usepackage{ifthen}
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\usepackage[table]{xcolor}
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\usepackage{textcomp}
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\usepackage{alltt}
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\usepackage{ifpdf}
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\ifpdf
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\usepackage[pdftex,
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pagebackref=true,
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colorlinks=true,
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linkcolor=blue,
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unicode
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]{hyperref}
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\else
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\usepackage[ps2pdf,
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pagebackref=true,
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colorlinks=true,
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linkcolor=blue,
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unicode
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]{hyperref}
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\usepackage{pspicture}
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\fi
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\usepackage[utf8]{inputenc}
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\usepackage{mathptmx}
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\usepackage[scaled=.90]{helvet}
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\usepackage{courier}
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\usepackage{sectsty}
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\usepackage{amssymb}
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\usepackage[titles]{tocloft}
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\usepackage{doxygen}
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\usepackage{fancyhdr}
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\pagestyle{fancy}
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\lstset{language=C++,inputencoding=utf8,basicstyle=\footnotesize,breaklines=true,breakatwhitespace=true,tabsize=4,numbers=left }
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\makeindex
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\setcounter{tocdepth}{3}
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\renewcommand{\footrulewidth}{0.4pt}
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\renewcommand{\familydefault}{\sfdefault}
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\hfuzz=15pt
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\setlength{\emergencystretch}{15pt}
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\hbadness=750
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\tolerance=750
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\begin{document}
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\hypersetup{pageanchor=false,citecolor=blue}
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\begin{titlepage}
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\vspace*{7cm}
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\begin{center}
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{\Large Intel\textsuperscript{\textregistered} Offload Runtime Library }\\
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\vspace*{1cm}
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{\large Generated by Doxygen $doxygenversion }\\
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\vspace*{0.5cm}
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{\small $datetime }\\
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\end{center}
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\end{titlepage}
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{\bf FTC Optimization Notice}
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Intel's compilers may or may not optimize to the same degree for non-Intel microprocessors for
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optimizations that are not unique to Intel microprocessors. These optimizations include SSE2,
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SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the
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availability, functionality, or effectiveness of any optimization on microprocessors not
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manufactured by Intel.
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Microprocessor-dependent optimizations in this product are intended for use with Intel
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microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for
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Intel microprocessors. Please refer to the applicable product User and Reference Guides for
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more information regarding the specific instruction sets covered by this notice.
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Notice revision \#20110804
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\vspace*{0.5cm}
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{\bf Trademarks}
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Intel, Xeon, and Intel Xeon Phi are trademarks of Intel Corporation in the U.S. and/or other countries.
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This document is Copyright \textcopyright 2014, Intel Corporation. All rights reserved.
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\pagenumbering{roman}
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\tableofcontents
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\pagenumbering{arabic}
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\hypersetup{pageanchor=true,citecolor=blue}
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