On ARM64 (and LoongArch64), the GEBP kernel uses nr=8, so the RHS is
packed in 8-column blocks. The half-packet and quarter-packet row
processing loops were iterating columns 4 at a time starting from j2=0,
misindexing into the 8-column packed RHS buffer. This produced
completely wrong results for float GEMM when the number of rows was
smaller than the SIMD packet size (e.g. 2x10 * 10x8 float).
Add the missing nr>=8 column iteration blocks to both loops, matching
the pattern already present in the 3x, 2x, 1x, and scalar remainder
sections.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
The L2 cache size threshold computation used numext::sqrt with a
static_cast<RealScalar>, which fails to compile when RealScalar is
AnnoyingScalar (a test-only type with multiple conversion constructors).
Since this is a pure cache-size computation unrelated to the matrix
scalar type, use std::sqrt(double) instead.
Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
Rasmus Munk Larsen